Design Comments


To ng-spice@ieee.ing.uniroma1.it
From Paolo Nenzi <pnenzi@ieee.ing.uniroma1.it>
Date Thu, 7 Oct 1999 14:26:40 +0200 (CEST)
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In-Reply-To <Pine.LNX.3.96.991007103012.23935A-100000@ieee.ing.uniroma1.it >
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To quote my previous message (I have some dimellas/ideas):

> Let's talk about the parser and the simulation kernel:
> 
> these are the more important and controversial parts of ng-spice: kev
> would like to make a mixed mode simulation kernel to allow for
> verilog/spice concurrent simulation. 
> 
> Any documents about parser and sim kernel writing ?

The simulation kernel of ng-spice should undergo a proces of rewriting,
because ng-spice has to become a mixed/mode analysis tool. Some people at
GeorgiaTech have already done this for their Xspice. I have never seen
their code but I can imagine that they have made some modifications
to the simulation routines to integrate discrete time signals and they
they treated all the digital devices as a kind of devices. 

It is possible to use the NODE_TYPE  (actually only VOLTAGE_NODE and
CURRENT_NODE) to build such a simulator ? Someone knows more ?

Then, if we would like to do mixed level simulation (using numerical
devices from cider or other device simulator), should we take into account
it writing the simulation kernel or not ? The actual spice/cider
implementation uses them as stadnard devices.

There was a discussion on the list on the language to use (C, C++, etc.).
I think that at the end C survived, but what about writing the parser in
C++ and the rest o the code in C ?

Multithread: the simulation kernel should be multithreated to gain speed
on multiprocessor architectures, what do you think ?


I have put down some open issues that a bad lunch had put in my mind,
would like some comments, so that we can issue a more detailed design
document.

Paolo


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