Ngspice and ADMS for Verilog-AMS modeling
ADMS is a code generator that converts electrical models written in Verilog-AMS into C code conforming to the API of spice simulators. The generated code will then be compiled into the simulator executable and the new device is ready for simulation.
What Verilog-AMS is ?
Verilog-AMS (AMS stands for Analog and Mixed Signals) is a language designed to describe and simulate analog and mixed signal designs using both the top-level design methodology as well as the more traditional bottom up approach.
ADMS uses extensions to the Verilog-AMS language, developed for compact modeling of devices.
ADMS distribution in ngspice
ADMS is distributed separately from ngspice. You can download the ADMS compiler from it's web site. Once you have downloaded and installed the compiler, you can add Verilog-AMS model to ngspice.
The process of adding a new device is far from being automatic and need a certain knowledge of spice internals. The file README.adms distributed with ngspice describes the process.
ADMS Licensing
ADMS is licensed under the terms of LGPL.
About the author:
The ADMS system is actively developed by Laurent Lamaitre.
ADMS Version
Ngspice implements ADMS version 2.2.0
Relevant Links
- ADMS: The home page of the ADMS system.
- Verilog-AMS: The Verilog-AMS Technical Subcommittee page.
- Verilog-A at CMC: Verilog-A links at Compact Model Council.
